; Justice Unlimited Gadget Microcode ; (C) 2004 Nathan (Acorn) Pooley ; ; ginit.inc ; ;@DOC@ initialization code ; ;############################################ ;############### INIT ####################### ;############################################ ; ; This gets called upon reset ; init: #if CHECK_TABLES movlw HIGH main_jump_end ; must end in 0 bank iorlw HIGH putc_jump_end ; must end in 0 bank btfss STATUS,Z bra error_table #endif clrf T0CON ; make sure timer0 is stopped (for sync) clrf INTCON ; disable interrupts ; ; PORTS ; clrf ADCON0 ; A/D off movlw 0x06 movwf ADCON1 ; PORTA bits are digital IO setf LATA ; set all port A outputs clrf TRISA ; PORTA is all outputs setf TRISB ; PORTB is all inputs setf TRISC ; PORTC is all inputs movlw 0xc0 ; PORTC = 1100 0000 movwf LATC ; RC0 = 0 spinner disable ; RC1 = 0 display disable ; RC2 = 0 light disable (parallel only) ; RC3 = 0 sound ; RC4 = 0 ir disable ; RC5 = 0 serial IO ; RC6 = 1 TX ; RC7 = 1 RX ; ; INTERRUPTS ; clrf INTCON2 ; reset all interrupts ; (also enables PORTB weak pull-ups) clrf INTCON3 clrf PIR1 clrf PIR2 clrf PIE2 clrf IPR2 clrf PIE1 clrf IPR1 bsf b_rbip ; PORTB is hi priority bsf b_tmr0ie ; enable timer0 interrupt (low pri) movlw 0x93 movwf RCON,0 ; enable interrupt priority, ; set !power on reset bit ; set !brown out bit ; ; time is synchronized here!!! ; NOTE: DO NOT JUMP HERE. To sync time jump to init (above) ; (interrupts must be disabled) ; ;time_sync_wait: ; btfss PORTB,0 ; if portb bit 0 is held low, then ; bra time_sync_wait ; wait until it goes high to sync clock fn_sync_1: ; ; timer0 ; movlw 0xc4 ; 11000100 movwf T0CON ; init timer0 ; running ; based on instruction clock ; 8 bit timer ; 5 bit prescale ; (wraps 1x per second) clrf TMR0L clrf v_time_addsec ; extra seconds clrf v_time_s ; seconds clrf v_time_m ; minutes clrf v_time_h ; hours (start at -1) clrf v_cluenum soft_reset: ; ; OTHER SETUP ; movlb BSR_DEFAULT ; set BSR to default value #if DEBUG_BITS setf PORTA #endif #if SIMULATE_SERIAL clrf v_ssbuf_ptr lfsr FSR0,BUF_SIMSERIAL init_ss_clr: clrf INDF0 decfsz FSR0L bra init_ss_clr #endif #if REPORT_ERRORS clrf v_hang_state #if 0 clrf v_oerrcnt_restart clrf v_oerrcnt_noack clrf v_oerrcnt_en_retry clrf v_oerrcnt_bus clrf v_oerrcnt_wcol clrf v_oerrcnt_nosspif #endif clrf v_cnt_turnon clrf v_cnt_outenab #endif #if FIX_ENAB movlw 80 movwf v_en_delay #endif ; ; setup other variables ; clrf v_bits1 ; turn all general purpose bits off clrf v_bits2 clrf v_func_event1 ; set all functions to NOP clrf v_func_event2 clrf v_func_event3 clrf v_func_default clrf v_errno ; ; ENABLE INTERRUPTS!!! ; bsf b_gieh bsf b_giel #if ENABLE_TEST_MODE btfss but_testmode bra testmode #endif rcall init_mode ; set welcome mode and init stack bsf b_turn_off ; turn off (not sleep) bra turn_off |
This file Copyright (C) 2004 by Nathan (Acorn) Pooley
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File created by do_doc at Wed Aug 4 17:53:09 2004